The transfer characteristic for a FET device is presented as a plot curves representing drain current as a function of drain-to-source voltage for a sequence of constant gate-to-source voltages, as illustrated in the figures above for the n-channel and p-channel JFET. After the JFET reaches saturation, iD remains relatively constant with a very small slope for further increases in vDS (the slope of the curves would be zero for an ideal device).
Below pinch-off, the channel essentially behaves like a constant resistance. This linear region of operation is called ohmic (or sometimes triode), and is where the JFET may be used as a resistor whose value is determined by the value of vGS. The transistor may function as a variable resistor when operated in the ohmic region by varying the value of vGS. However, as the magnitude of vGS increases, the range of vDS where the transistor may be operated as an ohmic resistor decreases. In the ohmic region, the potentials at all three terminals strongly affect the drain current, and the drain current obeys the relationship,
ID= K [2(VGS– VP)VDS-VDS2], where K= IDSS/VP2
Beyond the knee of the ohmic region, the curves become essentially flat in the active (or saturation) region of operation. To operate in the linear region, it is standard practice to define the dc bias current at the Q-point as between 30% and 70% of IDSS. This locates the Q-point in the most linear region of the characteristic curves.
The drain current in the saturation region may be defined by using the Shockley equation in terms of the drain-source saturation current (IDSS), the threshold voltage (denoted VP in your text) and the applied gate-to-source voltage (vGS) as:
IDSS is a function of temperature.